Thalwil, Switzerland

Gerd Scheller

This inventor holds 1 USPTO granted patent. Top assignee: Siemens Aktiengesellschaft. Active years: 2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gerd Scheller. Retrieved from https://idiyas.com/inventor/gerd-scheller

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 7(Granted Patents)


Company Filing History:


Years Active: 2002

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1 patent (USPTO):Explore Patents

Title: Gerd Scheller: Innovator in Memory Cell Technology

Introduction

Gerd Scheller is a notable inventor based in Thalwil, Switzerland. He has made significant contributions to the field of dynamic random access memory (DRAM) technology. His innovative work has led to the development of a unique memory cell design that enhances the efficiency and performance of memory storage.

Latest Patents

Scheller holds a patent for a memory cell for dynamic random access memory (DRAM). This memory cell incorporates a transistor and a capacitor, utilizing a silicon-filled vertical trench as the capacitor. A vertical transistor is superposed over the vertical trench in a silicon chip. An epitaxial layer is formed at the top of the fill in the trench to impart seed information to the primarily polysilicon silicon fill in the trench. A polysilicon layer is deposited over the top surface of the chip, is apertured over the top of the trench, and has its sidewalls oxidized. The opening is then refilled with epitaxial silicon, creating an inversion layer that serves as the channel of the transistor, while the deposited polysilicon layer functions as the word line. Another silicon layer is deposited over the epitaxial layer to serve as the bit line. The source/drain regions of the transistor are formed at the merger of the deposited layer with the fill in the trench and the merger with the polysilicon layer that serves as the bit line. This innovative design has the potential to improve memory performance significantly.

Career Highlights

Gerd Scheller is associated with Siemens Aktiengesellschaft, where he has contributed to various projects and advancements in technology. His work in memory cell design has positioned him as a key figure in the field of semiconductor technology.

Collaborations

Scheller has collaborated with notable colleagues, including Reinhard J. Stengl and Martin Gall. These collaborations have fostered innovation and development in the technology sector.

Conclusion

Gerd Scheller's contributions to memory cell technology exemplify the spirit of innovation in the field of electronics. His patent for a unique DRAM memory cell showcases his expertise and commitment to advancing technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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