Vif, France

Gérald Briat

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Stmicroelectronics International N.v.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gérald Briat. Retrieved from https://idiyas.com/inventor/gérald-briat

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Gérald Briat and Integrated Circuit Memory Controller Innovation.

Introduction

Gérald Briat is an inventor associated with Vif, France, and STMicroelectronics International N.V. His work includes an invention addressing how integrated circuit memory controllers manage error-related interrupts.

Latest Patents

Briat is credited with 1 patent, titled “Managing Integrated Circuit Memory Controller Interrupts.” The patent describes an integrated circuit with a memory controller that transfers stored information to a processing unit. An error-detection circuit applies an error-correcting code algorithm to identify errors and generate an interrupt signal. A transmission-control circuit sends that signal to the processing unit only when an error is detected for the first time in the information.

Career Highlights

Briat’s listed patent focuses on controlling the reporting of detected memory errors. By limiting interrupt transmission to the first detection, the design specifies how the memory controller communicates error information to the processing unit.

Collaborations

Briat’s listed coworkers include Jerome Lacan and Raphael Clauss. His patent is associated with STMicroelectronics International N.V.

Conclusion

Gérald Briat’s patent documents an approach to memory-controller error handling that coordinates error detection with interrupt transmission.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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