Gary Scott Tyson

Title: Gary Scott Tyson and Processor Instruction Innovations.

Introduction

Gary Scott Tyson is an inventor associated with Tallahassee, Florida, and The Florida State University Research Foundation, Inc. His patent work addresses processor design, instruction fetching, and ways to organize frequently used instructions. Tyson holds 2 patents.

Latest Patents

Tyson’s listed patents explore complementary approaches to improving instruction handling in processors.

“Systems and Methods for Lookahead Instruction Fetching for Processors Utilizing Tagless Hit Instruction Caches” describes a processor architecture that combines an L1 instruction cache with a tagless hit instruction cache. The smaller cache stores selected lines from the L1 cache, along with metadata indicating whether the next instruction is guaranteed to be available there. Direct access between the instruction fetcher and both caches, as well as between the caches, supports lookahead instruction fetching.

“Systems, Methods, and Computer Program Products for Packing Instructions into Register Files” presents architectural and compiler techniques for placing frequently used instructions in instruction register files. Identifiers represent stored instructions, allowing packed instructions retrieved from an instruction cache to refer to them. The approach supports tightly or loosely packed instructions alongside conventional instructions and may also provide an additional layer of indirection that enhances software security.

Career Highlights

Tyson’s patent portfolio focuses on processor efficiency and instruction management. His inventions describe methods for anticipating instruction needs and reducing the overhead of repeatedly handling frequently used instructions.

Collaborations

The listed collaborators include David Whalley and Stephen Roderick Hines. Tyson’s work is associated with The Florida State University Research Foundation, Inc.

Conclusion

Gary Scott Tyson’s two patents highlight innovations in instruction caching and register-file-based instruction packing, with potential benefits for processor performance and software security.