This inventor holds 1 USPTO granted patent. Top assignee: Indian Institute of Technology Bombay (Iit Bombay). Active years: 2026.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2026
Title: Ganpat Anant Parulekar: Patent Work in Multi-Lane Interconnects.
Introduction
Ganpat Anant Parulekar is an inventor based in Mumbai, India, associated with the Indian Institute of Technology Bombay. His listed patent work addresses interference mitigation in multi-lane interconnects.
Latest Patents
Parulekar is credited with 1 patent. His patent, “Self-interference, echo and crosstalk mitigation in multi-lane interconnects,” describes a method for reducing interference during simultaneous signal transmission and reception over the same transmission line. The disclosed approach adjusts impedances so that the input impedance matches the line’s characteristic impedance, and tunes transconductance or driver cells to cancel or suppress interference at a receiver front-end input.
Career Highlights
The available information connects Parulekar’s patent activity with the Indian Institute of Technology Bombay. The patent focuses on signal integrity in multi-lane communication systems, where self-interference, echoes, and crosstalk can affect reliable data transmission.
Collaborations
Parulekar’s listed coworkers include Shalabh Gupta and Sandeep Goyal. The provided information does not specify their individual roles in the patent.
Conclusion
Ganpat Anant Parulekar’s recorded invention addresses a practical challenge in high-speed interconnects by using impedance adjustment and circuit tuning to mitigate interference.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile