Sunnyvale, CA, United States of America

Gajendra Prasad Signh

This inventor holds 1 USPTO granted patent. Top assignee: Cold Brick Semiconductor, Inc.. Active years: 2015.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gajendra Prasad Signh. Retrieved from https://idiyas.com/inventor/gajendra-prasad-signh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


Average Co-Inventor Count = 1.0

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2015

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1 patent (USPTO):Explore Patents

Title: Gajendra Prasad Singh: Innovator in Semiconductor Technology

Introduction

Gajendra Prasad Singh is a notable inventor based in Sunnyvale, CA (US). He has made significant contributions to the field of semiconductor technology, particularly in reducing leakage current in semiconductor devices. His innovative approach has the potential to enhance the efficiency of electronic circuits.

Latest Patents

Gajendra Prasad Singh holds a patent for a "Semiconductor device with reduced leakage current and method for manufacture of the same." This invention focuses on semiconductor devices that minimize leakage current, which is crucial for both static and dynamic circuits. The technology is designed to reduce leakage current when the node is not transitioning, a state that occurs more than 95% of the time in typical operations.

Career Highlights

Gajendra Prasad Singh is currently associated with Cold Brick Semiconductor, Inc. His work at the company emphasizes the development of advanced semiconductor solutions that address common challenges in the industry. His expertise in this area has positioned him as a valuable asset in the field of semiconductor innovation.

Collaborations

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Conclusion

Gajendra Prasad Singh's contributions to semiconductor technology, particularly through his patented innovations, highlight his role as a key figure in advancing electronic efficiency. His work continues to influence the development of more effective semiconductor devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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