Taoyuan, Taiwan

Fwu-Juh Huang

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Mediatek Corporation. Active years: 2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Fwu-Juh Huang. Retrieved from https://idiyas.com/inventor/fwu-juh-huang

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 1 

Average Co-Inventor Count = 5.0

ph-index = 1

Forward Citations = 7(Granted Patents)


Company Filing History:


Years Active: 2014

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1 patent (USPTO):Explore Patents

Title: Fwu-Juh Huang: Innovator in Semiconductor Technology

Introduction

Fwu-Juh Huang is a notable inventor based in Taoyuan Hsien, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly through his innovative patent.

Latest Patents

Huang holds a patent titled "Method of packing-based macro placement and semiconductor chip using the same." This invention introduces a multi-packing tree (MPT) macro placer. The MPT macro placer is designed to read input files in a LEF/DEF format, create a k-level binary multi-packing tree, optimize the multi-packing tree based on packing results, and generate output files in a DEF format. This patent showcases his expertise in enhancing semiconductor chip design and placement.

Career Highlights

Fwu-Juh Huang is currently employed at MediaTek Corporation, a leading company in the semiconductor industry. His work at MediaTek has allowed him to apply his innovative ideas and contribute to the advancement of technology in this field.

Collaborations

Huang has collaborated with notable colleagues, including Tung-Chieh Chen and Ping-Hung Yu. These partnerships have likely fostered a creative environment that encourages innovation and the development of cutting-edge technologies.

Conclusion

Fwu-Juh Huang's contributions to semiconductor technology through his patent and work at MediaTek Corporation highlight his role as an influential inventor in the industry. His innovative approaches continue to shape the future of semiconductor design and placement.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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