Pflugerville, TX, United States of America

Fred Cumplan

This inventor holds 1 USPTO granted patent. Top assignee: Motorola Corporation. Active years: 2000.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Fred Cumplan. Retrieved from https://idiyas.com/inventor/fred-cumplan

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 7(Granted Patents)


Company Filing History:


Years Active: 2000

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1 patent (USPTO):Explore Patents

Title: Fred Cumplan: Semiconductor Process Inventor

Introduction

Fred Cumplan is an inventor associated with Pflugerville, Texas, and Motorola Corporation. His patent work addresses semiconductor fabrication, specifically a method for forming a cavity that provides access to deep fuse structures. He is credited with 1 patent in the information provided.

Latest Patents

Cumplan’s listed patent is “Method for Forming a Cavity Capable of Accessing Deep Fuse Structures.” The method uses a staged etching process to create a cavity reaching a structure such as a poly fuse. First, a mask is formed over the structure, and an etch proceeds partway through a first dielectric layer. A second dielectric layer is then deposited, and another mask is used to complete the etch. The final etch passes through the second dielectric layer to an area at or near the target structure. The resulting device retains unetched second dielectric material along the cavity sidewalls.

Career Highlights

The patent reflects Cumplan’s contribution to semiconductor processing techniques for accessing deeply positioned fuse structures. Its layered deposition and etching sequence describes a way to form the cavity while preserving dielectric material on its sidewalls.

Collaborations

Cumplan’s listed coworkers include Gary Pfeffer and Joel Patrick Mitchell. The provided information associates him with Motorola Corporation but does not specify the coworkers’ roles in the patent.

Conclusion

Fred Cumplan’s listed invention focuses on a staged dielectric etch process for reaching deep fuse structures, documenting his contribution to semiconductor fabrication technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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