This inventor holds 1 USPTO granted patent. Top assignee: Advanced Micro Devices Corporation. Active years: 1999.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1999
Title: Farrokh Omid-Zehoor: Semiconductor Process Innovation
Introduction
Farrokh Omid-Zehoor is an inventor associated with Sunnyvale, California, and Advanced Micro Devices Corporation. His patent work addresses semiconductor fabrication, with a focus on improving field-effect transistor performance through an optimized gate oxidation process.
Latest Patents
The provided information identifies one patent associated with Omid-Zehoor: “Method for Construction and Fabrication of Submicron Field-Effect.” The invention introduces a gate oxidation step after forming the gate and before forming the source and drain. By exposing the gate to oxygen at a selected temperature and for a selected duration, the process oxidizes portions of the gate conductive layer near its interfaces, increasing the effective thickness of the gate dielectric.
The patent describes an embodiment using a polysilicon gate and a silicon oxide dielectric in MOS transistors. In this process, polysilicon oxidation takes place before the low-doped-drain implant. The specified conditions for optimized transistor performance are 850°C for 115 minutes. The process may also use a controlled flow of hydrogen chloride.
Career Highlights
Omid-Zehoor’s documented patent contribution concerns optimizing transistor fabrication to support improved speed and performance. The patent describes how carefully controlled oxidation can modify gate interfaces and increase effective dielectric thickness.
Collaborations
The provided information lists Hao Fang and Chris Schmidt as Omid-Zehoor’s coworkers. It does not specify their roles in the patent or the invention.
Conclusion
Farrokh Omid-Zehoor’s patent documents a targeted semiconductor manufacturing innovation that uses controlled gate oxidation to optimize submicron transistor performance.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
