Loveland, CO, United States of America

Eric Matthew Lee

This inventor holds 1 USPTO granted patent. Top assignee: Hewlett-Packard Development Company, L.p.. Active years: 2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Eric Matthew Lee. Retrieved from https://idiyas.com/inventor/eric-matthew-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 2.0

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Company Filing History:


Years Active: 2006

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1 patent (USPTO):Explore Patents

Title: Eric Matthew Lee and Electronic Gate Test-Vector Generation

Introduction

Eric Matthew Lee is an inventor associated with Loveland, Colorado, and Hewlett-Packard Development Company, L.P. His patent work addresses methods for analyzing electronic gate cells through the generation of test vectors.

Latest Patents

Lee is named on 1 patent: “Systems and Methods for Generating Test Vectors to Analyze Cells of Electronic Gates.” The invention describes systems, software products, and methods for generating test vectors to analyze cells in an electronic gate library. A cell is selected electronically, and possible input combinations of stimuli are identified. Combinations that do not affect the cell’s maximum or minimum signal-propagation timing are removed, and test vectors are generated from the remaining combinations.

Career Highlights

Lee’s documented patent contribution focuses on streamlining the analysis of electronic gate cells by narrowing the input combinations used to create test vectors. The patent record associates him with Hewlett-Packard Development Company, L.P.

Collaborations

Lee’s listed coworker is Charles Corey Pie. Their shared association provides context for Lee’s professional connections, although the supplied information does not specify the details of their collaboration.

Conclusion

Eric Matthew Lee’s patent work centers on generating focused test vectors for analyzing electronic gate cells, with an approach designed to preserve the input combinations relevant to signal-propagation timing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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