Yerres, France

Eric Ciuciu

This inventor holds 1 USPTO granted patent. Top assignee: Thomson-Csf. Active years: 1987.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Eric Ciuciu. Retrieved from https://idiyas.com/inventor/eric-ciuciu

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 6(Granted Patents)


Company Filing History:


Years Active: 1987

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1 patent (USPTO):Explore Patents

Title: Eric Ciuciu: Innovator in Logic Circuit Testing

Introduction

Eric Ciuciu is a notable inventor based in Yerres, France. He has made significant contributions to the field of integrated logic circuits and digital circuits. His innovative approach has led to the development of a unique device that enhances the testing process for these circuits.

Latest Patents

Eric Ciuciu holds a patent for a "Device for translating a test sequence to a burn-in sequence for a logic." This invention provides a method and device for the automatic translation of a test truth-table into a burn-in truth-table. The automatic generation of test sequences not only reduces costs but also ensures reliable detection of circuit faults through consistent testing methods.

Career Highlights

Throughout his career, Eric has worked with Thomson-Csf, where he has applied his expertise in logic circuit testing. His work has been instrumental in improving the reliability and efficiency of testing procedures in the industry.

Collaborations

Eric Ciuciu has collaborated with notable coworkers such as Jean C Imbert and Jacques Flandrois. Their combined efforts have contributed to advancements in the field of integrated circuits.

Conclusion

Eric Ciuciu's innovative contributions to logic circuit testing demonstrate his commitment to enhancing technology in this field. His patent reflects a significant advancement that benefits both cost efficiency and reliability in circuit testing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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