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For the Inventor, By the Inventor

San Jose, CA, United States of America

Ehsan Khish Ardestani Zadeh

This inventor holds 16 USPTO granted patents and 6 published patent applications and 3 EPO patents. Top assignees: Meta Platforms, Inc., Huawei Technologies Co., Limited. Active years: 2020-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ehsan Khish Ardestani Zadeh. Retrieved from https://idiyas.com/inventor/ehsan-khish-ardestani-zadeh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 16 

% Patents Active = 81.3

 

Average Co-Inventor Count = 5.4

ph-index = 3

Forward Citations = 58(Granted Patents)


Location History:

  • San Jose, CA (US) (2020 - 2023)
  • Sane Jose, CA (US) (2023)

Company Filing History:

goldMedal15 out of 9,905 
 
Meta Platforms, Inc.
 patents
silverMedal1 out of 27,557 
 
Huawei Technologies Co., Limited
 patents

Years Active: 2020-2025

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16 patents (USPTO):Explore Patents
1. 12282429 - Systems and methods for adaptive hybrid hardware pre-fetch (2025-04-21),
2. 11829441 - Device and method for flexibly summing matrix values (2023-11-28),
3. 11699081 - Systems and methods for reducing data movement during convolution operations in artificial neural networks (2023-07-11),
4. 11599181 - Systems and methods for reducing power consumption of convolution operations of artificial neural networks (2023-03-07),
5. 11580192 - Grouped convolution using point-to-point connected channel convolution engines (2023-02-14),
6. 11537865 - Mapping convolution to a channel convolution engine (2022-12-27),
7. 11520854 - Support for different matrix multiplications by selecting adder tree intermediate results (2022-12-06),
8. 11520853 - Mapping convolution to a partition channel convolution engine (2022-12-06),
9. 11481471 - Mapping convolution to a matrix processor unit (2022-10-25),
10. 11455143 - Using a low-bit-width dot product engine to sum high-bit-width numbers (2022-09-27),
11. 11443013 - Pipelined pointwise convolution using per-channel convolution operations (2022-09-13),
12. 11409838 - High throughput matrix processor with support for concurrently processing multiple matrices (2022-08-09),
13. 11379557 - Device and method for flexibly summing matrix values (2022-07-05),
14. 11188303 - Floating point multiply hardware using decomposed component numbers (2021-11-30),
15. 11138292 - Circuit and method for computing depthwise convolution (2021-10-05),

Title: The Innovative Mind of Ehsan Khish Ardestani Zadeh

Introduction:

Ehsan Khish Ardestani Zadeh is a visionary inventor based in San Jose, CA. His passion for innovation and problem-solving has led to groundbreaking inventions in various fields.

Latest Patents:

Ehsan Khish Ardestani Zadeh holds several patents in the areas of technology, healthcare, and sustainability. His recent patents focus on enhancing user experience through cutting-edge design and functionality.

Career Highlights:

With a background in engineering and design, Ehsan Khish Ardestani Zadeh has had a successful career marked by a series of innovative projects. His ability to blend creativity with technical expertise sets him apart in the world of inventors.

Collaborations:

Ehsan Khish Ardestani Zadeh has collaborated with leading tech companies and research institutions to bring his ideas to life. His collaborative spirit and dedication to excellence have resulted in the development of impactful inventions.

Conclusion:

In conclusion, Ehsan Khish Ardestani Zadeh is a prolific inventor whose work continues to shape the future of technology. His relentless pursuit of innovation and commitment to excellence make him a standout figure in the world of inventors.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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