Portland, OR, United States of America

Douglas M Horn

This inventor holds 1 USPTO granted patent. Top assignee: Lsi Corporation. Active years: 2009.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Douglas M Horn. Retrieved from https://idiyas.com/inventor/douglas-m-horn

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2009

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1 patent (USPTO):Explore Patents

Title: Douglas M. Horn and a Multi-Wavelength Mask for Multilayer Printing

Introduction

Douglas M. Horn is an inventor associated with Portland, Oregon, and LSI Corporation. His patent work addresses a challenge in integrated-circuit manufacturing: accurately aligning patterns for separate layers during printing.

Latest Patents

Horn is credited with 1 patent, titled “Multi Wavelength Mask for Multi Layer Printing on a Process Substrate.” The invention describes a mask designed to expose two separate layers of an integrated circuit on a process substrate.

The mask uses a substrate that transmits two different wavelengths of light. A first patterned material is substantially opaque to the first wavelength, while a second patterned material is substantially opaque to the second wavelength. The patterns are aligned on the mask so that the corresponding layers can be properly aligned on the process substrate.

Career Highlights

Horn’s listed patent connects his work with LSI Corporation to semiconductor fabrication and multilayer patterning. The invention’s approach uses wavelength-selective materials to support the accurate placement of patterns for different integrated-circuit layers.

Collaborations

Horn’s listed coworkers include Duane B. Barber and Phong Thanh Do. Their names provide context for the professional network associated with his work.

Conclusion

Douglas M. Horn’s patent describes a wavelength-selective mask intended to improve alignment when printing multiple integrated-circuit layers, reflecting a focused contribution to semiconductor manufacturing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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