Derrick Butt

Title: Derrick Butt: Innovator in DDR Memory Systems

Introduction

Derrick Butt is a notable inventor based in Dublin, California, who has made significant contributions to the field of memory systems. He holds a patent that addresses critical aspects of Double Data Rate (DDR) memory systems, showcasing his expertise in integrated circuit design and testing.

Latest Patents

Derrick Butt's most recent patent is focused on "Bit error testing and training in double data rate (DDR) memory system." This innovation involves a DDR PHY interface that facilitates bit error testing and training for DDR memory systems. The integrated circuit features a bit error test (BERT) controller that generates a bit pattern, along with a physical interface comprising multiple byte lanes. The design includes a loopback path connecting a first byte lane to a second byte lane, allowing the BERT controller to write and evaluate the bit pattern. The evaluation process includes verifying the accuracy of the written and read bit pattern, conducting gate training, performing read leveling training, and executing write bit de-skew training to align bits within a byte lane.

Career Highlights

Derrick Butt is currently employed at Avago Technologies General IP (Singapore) Pte. Ltd., where he continues to develop innovative solutions in the field of memory technology. His work has contributed to advancements in the efficiency and reliability of DDR memory systems.

Collaborations

Throughout his career, Derrick has collaborated with talented professionals, including Curtis Matheson Webster and Dharmesh N Bhakta. These collaborations have further enriched his work and contributed to the success of various projects.

Conclusion

Derrick Butt's contributions to DDR memory systems through his innovative patent demonstrate his commitment to advancing technology in this critical area. His work continues to influence the development of reliable memory systems, showcasing the importance of innovation in the tech industry.