Debjit Sinha

Title: Debjit Sinha and Multiply-Instantiated Block Modeling

Introduction

Debjit Sinha is an inventor based in Fremont, California, and is associated with Google Inc. His work includes a patent for a method of representing multiply-instantiated blocks in integrated-circuit placement models. The patent record lists 1 patent for Sinha.

Latest Patents

Sinha’s patent, “Multiply-Instantiated Block Modeling for Circuit Component Placement in Integrated Circuit,” describes a way to reduce or avoid uniquifying blocks in a chip-level graph while retaining block-specific information. The method selects a base block from each group generated by a multiply-instantiated block. It encodes the base block’s physical position in a reduced graph and represents the positions of the other blocks as linear transformations of that position across the chip.

By representing each group of blocks instantiated from the same multiply-instantiated block as a single instance, the approach can reduce the graph’s size. The reduced graph can then be used in circuit-component placement processes that seek placements according to specified objectives.

Career Highlights

Sinha’s listed patent focuses on improving how integrated-circuit blocks are modeled for placement. Its approach aims to preserve useful placement information while simplifying the graph used by placement tools. The available information identifies Google Inc. as his company.

Collaborations

Myung-Chul Kim is identified as Sinha’s coworker. The provided information does not specify the nature of their collaboration or whether Kim is a co-inventor on this patent.

Conclusion

Debjit Sinha’s patent presents a graph-reduction approach for modeling repeated blocks in integrated-circuit placement, balancing a smaller representation with the retention of block-specific physical-position information.