San Jose, CA, United States of America

Debabrata Ghosh

This inventor holds 4 USPTO granted patents. Top assignee: Applied Materials, Inc.. Active years: 2000-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Debabrata Ghosh. Retrieved from https://idiyas.com/inventor/debabrata-ghosh-bqqa5w1r

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 4

Forward Citations = 167(Granted Patents)


Company Filing History:


Years Active: 2000-2002

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4 patents (USPTO):Explore Patents

Title: Debabrata Ghosh: Innovator in Semiconductor Fabrication Technology

Introduction

Debabrata Ghosh is a prominent inventor based in San Jose, CA, known for his contributions to semiconductor fabrication technology. He holds a total of 4 patents that reflect his innovative approach to improving manufacturing processes in the industry.

Latest Patents

One of his latest patents is for an integrated electrodeposition and chemical mechanical polishing tool. This fabrication tool integrates one or more electrodeposition stations with a CMP apparatus. The tool can transport substrates from the electroplating stations to the CMP apparatus without an intervening cleaning step. Additionally, the thickness of an electrodeposited layer can be measured at a metrology station prior to polishing, utilizing an instrument that physically contacts the surface of the substrate. The measured thickness can then be used to adjust the polishing parameters. Furthermore, the fabrication tool may have a single interface in which a dry and clean wafer is returned.

Another significant patent involves alternate steps of IMP and sputtering processes to improve sidewall coverage. This invention provides a method and apparatus for achieving conformal step coverage on a substrate by physical vapor deposition (PVD). A target provides a source of material to be sputtered by a plasma and then ionized. Ionization is facilitated by maintaining a sufficiently dense plasma using an inductive coil. The ionized material is deposited on the substrate, which is biased to a negative voltage. A signal provided to the target during processing includes a negative voltage portion and a zero-voltage portion. During the negative voltage portion, ions are attracted to the target to cause sputtering. During the zero-voltage portion, sputtering from the target is terminated while the bias on the substrate causes reverse sputtering. The negative voltage portion and the zero-voltage portion are alternated to cycle between a sputter step and a reverse sputter step. The film quality and uniformity can be controlled by adjusting various process parameters.

Career Highlights

Debabrata Ghosh is currently employed at Applied Materials, Inc., where he continues to innovate in the field of semiconductor manufacturing. His work has significantly impacted the efficiency and effectiveness of fabrication processes.

Collaborations

Throughout his career, Debabrata has collaborated with notable colleagues, including Bret W Adams and Sasson Roger Somekh. These collaborations have further enhanced his contributions to the field.

Conclusion

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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