Matsumoto, Japan

Dawei Cao



Average Co-Inventor Count = 2.8

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2014-2016

Loading Chart...
Loading Chart...
3 patents (USPTO):Explore Patents

Title: Dawei Cao: Innovator in Semiconductor Technology

Introduction

Dawei Cao is a prominent inventor based in Matsumoto, Japan. He has made significant contributions to the field of semiconductor technology, holding a total of 3 patents. His work focuses on enhancing the performance and reliability of semiconductor devices.

Latest Patents

One of Dawei Cao's latest patents is a semiconductor device with an electric field reduction mechanism in an edge termination region surrounding the active region. This innovative design includes guard rings and field plates that work together to reduce electric fields, improving the device's overall performance. Another notable patent is a semiconductor device that enhances electric charge resistance. This device features a first parallel p-n layer and a second parallel p-n layer, along with multiple p-type guard ring areas that contribute to its efficiency.

Career Highlights

Dawei Cao is currently employed at Fuji Electric Co., Ltd., where he continues to develop cutting-edge semiconductor technologies. His expertise in the field has led to advancements that benefit various applications in electronics.

Collaborations

Throughout his career, Dawei has collaborated with notable colleagues, including Yasuhiko Onishi and Yasunori Agata. These partnerships have fostered innovation and contributed to the success of their projects.

Conclusion

Dawei Cao's work in semiconductor technology exemplifies the impact of innovative thinking in the electronics industry. His patents reflect a commitment to enhancing device performance and reliability, making him a valuable contributor to the field.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…