Fuji Electric Co., Ltd.

Dawei Cao

Yasuhiko Onishi

Takahiro Tamura

Yasunori Agata

Mutsumi Kitamura

Takashi Shiigi

In a semiconductor device, an edge termination region which surrounds an active region includes an electric field reduction mechanism including guard rings, first field plates which come into contact with the guard rings, and second field plates which are provided on the first field plates, with an interlayer insulating film interposed therebetween. The second field plate is thicker than the first field plate. A gap between the second field plates is greater than a gap between the first field plates. A barrier metal film is provided between the second field plate and the interlayer insulating film so as come into conductive contact with the second field plate. A gap between the barrier metal films is equal to the gap between the first field plates.

Semiconductor device with an electric field reduction mechanism in an edge termination region surrounding the active region

A semiconductor device is disclosed that has enhanced its electric charge resistance. A first parallel p-n layer is disposed in an element activating part, and a second parallel p-n layer is disposed in an element peripheral edge part. An nsurface area is disposed between the second parallel p-n layer and a first principal face. Two or more p-type guard ring areas are disposed so as to be separate from each other on the first principal face side of the nsurface area. First field plate electrodes and second field plate electrodes are electrically connected to p-type guard ring areas. Second field plate electrodes cover the first field plate electrodes adjacent to each other so as to cover the first principal face between the first field plate electrodes through a second insulating film.

Semiconductor device

Semiconductor regions are alternately arranged in a parallel pn layer in which an n-type region and a p-type region are alternately arranged parallel to the main surface of a semiconductor substrate. Pitch between n drift region and p partition region of a second parallel pn layer in an edge termination region is two thirds of pitch between n drift region and p partition region of a first parallel pn layer in an active region. At boundaries between main SJ cells and fine SJ cells at four corners of the semiconductor substrate having rectangular shape in plan view, ends of two pitches of main SJ cells face the ends of three pitches of fine SJ cells. In this way, it is possible to reduce the influence of a process variation and thus reduce mutual diffusion between n drift region and p partition region of the fine SJ cell.

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Matsumoto, Japan

Dawei Cao