Petach Tikva, Israel

Daniel Shterman

USPTO Granted Patents = 2 

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2017-2025

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2 patents (USPTO):Explore Patents

Title: Innovations by Daniel Shterman

Introduction

Daniel Shterman is an accomplished inventor based in Petach Tikva, Israel. He holds a total of 2 patents that showcase his expertise in computing and processing technologies. His innovative contributions have significantly impacted the field of hardware acceleration and topology configuration.

Latest Patents

One of Shterman's latest patents is a hardware accelerator for computing an algebraic function. This multi-thread processor computes functions that require only modular additions and multiplications. The system utilizes memories to store constants, multi-bit elements, and multiple instruction sets. A multiplier receives first and second multiplier operands, generating their product, which is then fed to an adder as a first operand. This product is added to a second adder operand, with the sum being stored in an accumulator memory. Each instruction set is executed on a successive clock and includes instructions for defining respective addresses in the memories from which constants, elements, and sums are accessed. A scheduler maintains a schedule of threads executable by the processor in parallel, configured to cycle through the threads and initiate the first available thread. Selectors responsive to instructions from the program memory select the required multiplier and adder operands. This multi-core system executes multiple parallel threads on multiple processors, allowing complex functions to be computed efficiently.

Another significant patent involves the topology configuration of processing elements array using packets. This disclosure is directed to methods and systems for configuring an array of packet processing elements via a topology configuration packet. Each processing element includes input packet busses from a first plurality of neighboring processing elements and output packet busses to a second plurality of neighboring processing elements. Each processing element receives the configuration packet from one of the first plurality of neighboring elements, sets its own topology configuration register according to predetermined values within the packet, and forwards the packet out through all of its outputs, similar to a standard packet.

Career Highlights

Throughout his career, Daniel Shterman has worked with notable companies such as Avago Technologies, General IP (Singapore) Pte. Ltd., and Ingonyama Ltd. His experience in these organizations has contributed to his development as an inventor and innovator in the technology sector.

Collaborations

Shterman has collaborated with talented individuals, including Michael Assa and Michael Asa. These partnerships have likely fostered a creative environment that encourages innovation and the development of new ideas.

Conclusion

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