Palo Alto, CA, United States of America

Daniel J Flees


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 4(Granted Patents)


Company Filing History:


Years Active: 2017

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1 patent (USPTO):Explore Patents

Title: The Innovations of Daniel J Flees

Introduction

Daniel J Flees is an accomplished inventor based in Palo Alto, CA. He has made significant contributions to the field of integrated circuit design, particularly in the area of clock gating. His innovative approach has the potential to enhance the efficiency of electronic devices.

Latest Patents

Daniel holds a patent for a method titled "Method for gating clock signals using late arriving enable signals." This patent describes a technique for designing clock gates that may reduce timing requirements associated with clock gating control signals. The method involves identifying a clock gating function within a Hardware Description Language (HDL) of an integrated circuit. It captures the state of an enable signal that is dependent on a clock signal. The process includes determining a delay time for capturing the state of the enable signal based on the time difference between transitions of the enable signal and the clock signal. Furthermore, it involves creating a gating circuit that includes a delay unit coupled to a source of the clock signal, with a delay value that is dependent on the time required to delay capturing the enable signal. The HDL model is then modified based on the clock gating circuit.

Career Highlights

Daniel is currently employed at Apple Inc., where he continues to innovate and contribute to cutting-edge technology. His work focuses on improving the performance and efficiency of integrated circuits, which are essential components in modern electronic devices.

Collaborations

Throughout his career, Daniel has collaborated with talented individuals such as Suparn Vats and Rohit Kumar. These collaborations have fostered a creative environment that encourages the development of innovative solutions in technology.

Conclusion

Daniel J Flees is a notable inventor whose work in clock gating has the potential to significantly impact the field of integrated circuit design. His contributions at Apple Inc. and his innovative patent demonstrate his commitment to advancing technology.

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