This inventor holds 1 USPTO granted patent. Top assignee: University of Illinois. Active years: 2003.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2003
Title: The Innovative Contributions of Daniel A. Connors
Introduction
Daniel A. Connors is a notable inventor based in Champaign, Illinois. He has made significant contributions to the field of computer architecture, particularly in enhancing instruction level parallelism. His work is characterized by a focus on efficient exception handling in speculative execution.
Latest Patents
Connors holds a patent titled "Method and apparatus for enhancing instruction level parallelism." This invention discloses a method and system for handling inline recovery from speculatively executed instructions. Each register in this system is equipped with an E-tag, which indicates if an exception occurred during the generation of the value stored in the register, and an R-tag, which manages data flow dependencies in recovery mode. The recovery process involves re-executing those speculative instructions that are data flow dependent on a first excepting speculative instruction. This architecture and method provide efficient exception handling when combining control speculation, data speculation, and predication, resulting in substantially enhanced instruction level parallelism. Connors has 1 patent to his name.
Career Highlights
Daniel A. Connors is affiliated with the University of Illinois, where he has contributed to various research initiatives. His work has been instrumental in advancing the understanding of instruction level parallelism and its applications in modern computing.
Collaborations
Connors has collaborated with esteemed colleagues such as Wen-mei William Hwu and David I. August. Their combined expertise has furthered research in computer architecture and speculative execution.
Conclusion
Daniel A. Connors is a prominent figure in the field of computer architecture, with a focus on enhancing instruction level parallelism through innovative methods and systems. His contributions continue to influence the landscape of computing technology.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
