Cynthia Mar

Title: Innovations by Inventor Cynthia Mar

Introduction

Cynthia Mar is a notable inventor based in Nepean, Canada. She has made significant contributions to the field of memory technology, holding a total of 3 patents. Her work focuses on enhancing the performance and efficiency of random access memory systems.

Latest Patents

Cynthia Mar's latest patents include a "Column redundancy circuit with reduced signal path delay." This invention discloses a synchronous DRAM with memory elements arranged in rows and columns. The memory elements are accessible by decoding a memory address, with normal column drivers activating appropriate memory elements in response to decoded column address signals. The invention also features redundant column drivers distributed throughout memory banks, which can flexibly replace faulty columns, minimizing timing differences and reducing the number of fuses required for repairs.

Another significant patent is the "Bi-directional data bus scheme with optimized read and write characters." This bi-directional global data bus scheme optimizes the performance of the data path for read and write operations. It offers a uniform read and write frequency to the external processor or controller. The system utilizes a dual local data bus structure, allowing the column address to change on every clock cycle, thus enhancing the efficiency of memory operations.

Career Highlights

Cynthia has worked with prominent companies such as Mosaid Technologies Corporation and Oki Electric Industry Co., Ltd. Her experience in these organizations has contributed to her expertise in memory technology and innovation.

Collaborations

Cynthia has collaborated with notable coworkers, including Xiao Luo and Sampei Miyamoto. Their joint efforts have further advanced the field of memory technology.

Conclusion

Cynthia Mar's innovative contributions to memory technology demonstrate her expertise and commitment to enhancing data processing systems. Her patents reflect a deep understanding of the complexities involved in memory design and optimization.