Taipei, Taiwan

Chung-Hsun Lin

This inventor holds 1 USPTO granted patent. Top assignee: National Taiwan University. Active years: 2004.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chung-Hsun Lin. Retrieved from https://idiyas.com/inventor/chung-hsun-lin-d5ygwxtd

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1


Company Filing History:


Years Active: 2004

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1 patent (USPTO):Explore Patents

Title: Innovations of Chung-Hsun Lin in Semiconductor Reliability

Introduction

Chung-Hsun Lin is a notable inventor based in Taipei, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in enhancing the reliability of metal-insulator-semiconductor structures. His innovative approach has garnered attention in the research community.

Latest Patents

Chung-Hsun Lin holds a patent titled "Method for utilizing rough insulator to enhance metal-insulator-semiconductor reliability." This patent outlines a method that includes several steps: providing a semiconductor substrate, prebaking the substrate under a relatively high vacuum to create a rough surface, and growing an insulator on the substrate to form a rough insulator. This process aims to increase the reliability of metal-insulator-semiconductor applications.

Career Highlights

Chung-Hsun Lin is affiliated with National Taiwan University, where he continues to engage in research and development in semiconductor technologies. His work has contributed to advancements in the field, showcasing his expertise and dedication to innovation.

Collaborations

Chung-Hsun Lin has collaborated with notable colleagues, including Fon Yuan and Chee-Wee Liu. These collaborations have further enriched his research and contributed to the development of new technologies in semiconductor reliability.

Conclusion

Chung-Hsun Lin's innovative methods in enhancing semiconductor reliability demonstrate his significant impact on the field. His contributions continue to influence research and development in semiconductor technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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