Taipei, Taiwan

Chung Hsun Lee

This inventor holds 1 USPTO granted patent. Top assignee: Nan Ya Technology Corporation. Active years: 2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chung Hsun Lee. Retrieved from https://idiyas.com/inventor/chung-hsun-lee-4p2tqq2q

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: Innovations of Chung Hsun Lee in Memory Device Technology.

Introduction

Chung Hsun Lee is a notable inventor based in Taipei, Taiwan. He has made significant contributions to the field of memory devices, particularly in enhancing their performance and reliability. His innovative approach has led to the development of a unique control method for memory devices.

Latest Patents

Chung Hsun Lee holds a patent for a "Memory device and control method for performing row hammer protection." This patent addresses critical issues in memory technology by providing a control method that includes access count values for memory rows. The method involves performing refresh operations on memory rows and managing access counts effectively, ensuring the integrity and performance of memory devices.

Career Highlights

Chung Hsun Lee is currently employed at Nan Ya Technology Corporation, where he continues to work on advancing memory technology. His expertise and innovative mindset have positioned him as a valuable asset in the field of electronics and memory solutions.

Collaborations

Chung Hsun Lee collaborates with William Wu Shen, contributing to various projects within their organization. Their teamwork exemplifies the synergy that can lead to groundbreaking advancements in technology.

Conclusion

Chung Hsun Lee's contributions to memory device technology highlight his role as an influential inventor. His patent on row hammer protection demonstrates his commitment to improving memory performance and reliability.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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