Chiloda Ashan Senarath Pathirane

This inventor holds 10 USPTO granted patents and 1 published patent application. Top assignee: Arm Limited. Active years: 2019-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chiloda Ashan Senarath Pathirane. Retrieved from https://idiyas.com/inventor/chiloda-ashan-senarath-pathirane

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 10 (Patent Applications = 1)

% Patents Active = 90.0

Average Co-Inventor Count = 2.6

ph-index = 1

Forward Citations = 2(Granted Patents)

Location History:

Cambourne, GB (2019 - 2022)
Cambridge, GB (2020 - 2022)

Company Filing History:

10 out of 3,778

Arm Limited

patents

Years Active: 2019-2026

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10 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 12761923 - Pipeline stage allocation (2026-10-13),

2. 11429393 - Apparatus and method for supporting out-of-order program execution of instructions (2022-08-30),

3. 11416252 - Program instruction fusion (2022-08-16),

4. 11216277 - Apparatus and method of capturing a register state (2022-01-04),

5. 11068238 - Multiplier circuit (2021-07-20),

6. 11036510 - Processing merging predicated instruction with timing permitting previous value of destination register to be unavailable when the merging predicated instruction is at a given pipeline stage at which a processing result is determined (2021-06-15),

7. 10963253 - Varying micro-operation composition based on estimated value of predicate value for predicated vector instruction (2021-03-30),

8. 10719329 - Apparatus and method for using predicted result values (2020-07-21),

9. 10552160 - Handling stalling event for multiple thread pipeline, and triggering action based on information access delay (2020-02-04),

10. 10296349 - Allocating a register to an instruction using register index information (2019-05-21),

Title: The Innovations of Chiloda Ashan Senarath Pathirane

Introduction

Chiloda Ashan Senarath Pathirane is a notable inventor residing in Cambourne, GB. He is recognized for his significant contributions to the field of data processing, holding a total of 9 patents that showcase his inventive prowess. His work has substantially impacted the efficiency and performance of data processing systems.

Latest Patents

Among his latest patents is the "Apparatus and Method for Supporting Out-of-Order Program Execution of Instructions." This invention presents an apparatus and method that enhances data processing operations by using physical registers to store data values, allowing for more efficient execution of out-of-order instructions. The system includes mappings between architectural and physical registers, effectively addressing data hazards during execution. Another important patent is the "Program Instruction Fusion," which improves data processing systems by enabling the identification of fusible groups of program instructions within an instruction pipeline, enhancing parallel processing capabilities.

Career Highlights

Chiloda currently works at Arm Limited, a leading company in semiconductor and software design. His work at Arm Limited involves pushing the boundaries of innovation in data processing technologies, particularly in the area of instruction execution and processing efficiency.

Collaborations

Chiloda collaborates with talented professionals such as Vladimir Vasekin and Alexei Fedorov. Together, they enhance the company's innovative projects, contributing to advancements in data processing architectures and systems.

Conclusion

Chiloda Ashan Senarath Pathirane's inventive contributions play a crucial role in modern data processing technologies. With his ongoing work and innovative spirit at Arm Limited, he continually strives to advance the capabilities of data processing systems, making significant strides in the field. His patents not only reflect his talent but also his commitment to shaping the future of technology.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

1 patent pending: