This inventor holds 1 USPTO granted patent. Top assignee: Raydium Semiconductor Corporation. Active years: 2013.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2013
Title: Chih-Chao Wang and Integrated Circuit Wafer Dicing
Introduction
Chih-Chao Wang is an inventor based in Zhubei, Taiwan. His patent work includes a method for dicing integrated circuit wafers, and he is associated with Raydium Semiconductor Corporation.
Latest Patents
Wang’s listed patent is “Integrated Circuit Wafer Dicing Method.” The method forms integrated circuits and test keys on a wafer, with the test keys positioned between adjacent circuits. A patterned protective film covers the integrated circuits while exposing the test keys, which are then etched using the film as a mask. The wafer is subsequently diced between the integrated circuits to produce discrete integrated circuit dies. Wang is credited with 1 patent.
Career Highlights
Wang’s patent describes a wafer-dicing process that uses test keys and a patterned protective film as part of the preparation for separating integrated circuit dies. He is associated with Raydium Semiconductor Corporation.
Collaborations
Ching-San Lin and Kun-Tai Wu are identified as Wang’s coworkers. The available information does not specify whether they collaborated with him on this patent.
Conclusion
Chih-Chao Wang’s listed invention addresses integrated circuit wafer dicing through a process involving test-key etching and die separation.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile