Fremont, CA, United States of America

Chi-Tay Huang

This inventor holds 1 USPTO granted patent. Top assignee: Programmable Microelectronics Corporation. Active years: 1999.


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1

Forward Citations = 25(Granted Patents)


Company Filing History:


Years Active: 1999

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1 patent (USPTO):Explore Patents

Title: The Innovations of Chi-Tay Huang

Introduction

Chi-Tay Huang is an accomplished inventor based in Fremont, CA. He has made significant contributions to the field of nonvolatile memory technology. His innovative work has led to the development of a unique PMOS memory array architecture.

Latest Patents

Chi-Tay Huang holds a patent for a PMOS memory array having OR gate architecture. This nonvolatile PMOS memory array includes a plurality of pages, where each column of a page features two series-connected PMOS OR strings in parallel with a bit line. Each PMOS OR string consists of a PMOS select transistor coupled between the bit line and two series-connected PMOS floating gate memory cells. The PMOS floating gate memory cells are programmed via channel hot electron (CHE) injection and erased through electron tunneling. A soft-program mechanism is employed to compensate for the over-erasing of the memory cells. In some embodiments, the bit lines are segmented along page boundaries to enhance speed.

Career Highlights

Chi-Tay Huang is currently associated with Programmable Microelectronics Corporation, where he continues to innovate in the field of memory technology. His work has been instrumental in advancing the capabilities of nonvolatile memory systems.

Collaborations

Chi-Tay Huang has collaborated with notable colleagues, including Shang-De Ted Chang and Chinh D Nguyen, contributing to various projects and innovations in the field.

Conclusion

Chi-Tay Huang's contributions to the field of nonvolatile memory technology exemplify his innovative spirit and dedication to advancing electronic memory systems. His patent for the PMOS memory array architecture showcases his expertise and commitment to pushing the boundaries of technology.

Profile summary based on public USPTO records.
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