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For the Inventor, By the Inventor

Kaohsiung Hsien, Taiwan

Chi-Che Tsai

USPTO Granted Patents = 13

Average Co-Inventor Count = 3.5

ph-index = 2

Forward Citations = 25(Granted Patents)


Location History:

  • Kaohsiung Hsien, TW (2003 - 2006)
  • Taipei, TW (2006)
  • Hsin-Tien, TW (2011)

Company Filing History:

goldMedal13 out of 1,961 
 
Via Technologies, Inc.
 patents

Years Active: 2003-2011

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13 patents (USPTO):Explore Patents
1. 8060676 - Method of hot switching data transfer rate on bus (2011-11-15),
2. 7136955 - Expansion adapter supporting both PCI and AGP device functions (2006-11-14),
3. 7107373 - Method of hot switching data transfer rate on bus (2006-09-12),
4. 7051148 - Data transmission sequencing method associated with briding device and application system (2006-05-23),
5. 6934789 - Interface, structure and method for transmitting data of PCI bus which uses bus request signal for judging whether a device supporting dual transmission mode (2005-08-23),
6. 6925517 - Bus for supporting plural signal line configurations and switch method thereof (2005-08-02),
7. 6836829 - Peripheral device interface chip cache and data synchronization method (2004-12-28),
8. 6721833 - Arbitration of control chipsets in bus transaction (2004-04-13),
9. 6718400 - Data accessing system with an access request pipeline and access method thereof (2004-04-06),
10. 6684284 - Control chipset, and data transaction method and signal transmission devices therefor (2004-01-27),
11. 6678771 - Method of adjusting an access sequencing scheme for a number of PCI- compliant units coupled to a PCI bus system (2004-01-13),
12. 6622213 - Two-way cache system and method for interfacing a memory unit with a peripheral device using first and second cache data regions (2003-09-16),
13. 6546448 - Method and apparatus for arbitrating access to a PCI bus by a plurality of functions in a multi-function master (2003-04-08),
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