Pasadena, CA, United States of America

Chester J Everline

This inventor holds 1 USPTO granted patent. Top assignee: California Institute of Technology. Active years: 2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chester J Everline. Retrieved from https://idiyas.com/inventor/chester-j-everline

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 6.0

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2013

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1 patent (USPTO):Explore Patents

Title: Chester J. Everline: Innovator in Circuit Lifetime Evaluation

Introduction

Chester J. Everline is a notable inventor based in Pasadena, California. He has made significant contributions to the field of electrical engineering, particularly in the evaluation of circuit lifetimes. His innovative approach has led to the development of a patented system that enhances the reliability of electrical systems.

Latest Patents

Chester J. Everline holds a patent for "Systems and methods for circuit lifetime evaluation." This invention focuses on estimating the lifetime of an electrical system through various analytical methods. One embodiment of the invention involves performing Worst Case Analysis (WCA) iteratively on a system design to determine the lifetime at which the system will pass or fail under specific conditions. The process includes identifying subcircuits, conducting Extreme Value Analysis (EVA), and refining WCA to ensure accurate lifetime assessments.

Career Highlights

Chester is affiliated with the California Institute of Technology, where he applies his expertise in electrical systems. His work has been instrumental in advancing methodologies for evaluating the performance and longevity of electrical components. With a patent portfolio that includes one significant patent, he continues to contribute to the field through research and innovation.

Collaborations

Chester collaborates with esteemed colleagues such as Eddy Shalom and Timothy L. Heaps. Their combined efforts in research and development have fostered advancements in circuit evaluation techniques.

Conclusion

Chester J. Everline's contributions to circuit lifetime evaluation exemplify the impact of innovative thinking in electrical engineering. His patented methods not only enhance system reliability but also pave the way for future advancements in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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