Hillsboro, OR, United States of America

Cheng Tan

USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

ph-index = 1


Company Filing History:


Years Active: 2025

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1 patent (USPTO):Explore Patents

Title: Cheng Tan - Innovator in Thin Film Transistor Technology

Introduction

Cheng Tan is a notable inventor based in Hillsboro, OR (US). He has made significant contributions to the field of semiconductor technology, particularly in the development of thin film transistors (TFTs). His innovative work focuses on reducing parasitic capacitance in transistor devices, which is crucial for enhancing the performance of memory structures.

Latest Patents

Cheng Tan holds a patent for "Dielectric sidewall features for tuning thin film transistor (TFT) parasitics." This patent presents techniques for forming transistor devices with reduced parasitic capacitance, which is essential for transistors used in memory structures. The invention describes a memory structure that includes memory cells, where each memory cell consists of an access device and a storage device. The access device may be a thin film transistor (TFT), while the storage device typically includes a capacitor. The patent details the inclusion of a dielectric liner that extends along the sidewalls of the TFT, which helps to minimize parasitic capacitance between the contacts of the TFT and its gate electrode.

Career Highlights

Cheng Tan is currently employed at Intel Corporation, where he continues to advance his research in semiconductor technologies. His work has been instrumental in improving the efficiency and performance of memory devices, making significant strides in the industry.

Collaborations

Cheng has collaborated with notable colleagues, including Yu-Wen Huang and Hui-Min Chuang, to further enhance the development of innovative technologies in the semiconductor field.

Conclusion

Cheng Tan's contributions to the field of thin film transistors and memory structures highlight his role as a leading inventor in semiconductor technology. His patent on dielectric sidewall features demonstrates his commitment to innovation and excellence in reducing parasitic capacitance, which is vital for the advancement of modern electronics.

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