Hsinchu, Taiwan

Chen-Yi Liu

This inventor holds 1 USPTO granted patent and 1 published patent application. Top assignee: Mediatek Corporation. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chen-Yi Liu. Retrieved from https://idiyas.com/inventor/chen-yi-liu-tofqvxvh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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USPTO Granted Patents = 1 

Average Co-Inventor Count = 1.0

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Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Innovations of Chen-Yi Liu in HDMI Technology

Introduction

Chen-Yi Liu is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of HDMI technology, particularly in error correction systems. His work is recognized for its innovative approach to enhancing signal integrity in HDMI communications.

Latest Patents

Chen-Yi Liu holds a patent for an "HDMI FRL correction system and method thereof." This patent describes an HDMI FRL error correction system that includes a SR/SSB correlator, an SR/SSB lock detector, an SR/SSB predictor, an SR/SSB bit error corrector, and an SR/SSB detector. The system is designed to improve the reliability of HDMI signals by accurately correlating input signals and correcting errors, thereby ensuring high-quality audio and video transmission. He has 1 patent to his name.

Career Highlights

Chen-Yi Liu is currently employed at MediaTek Corporation, a leading global semiconductor company. His role involves research and development in advanced communication technologies, where he applies his expertise in HDMI systems to create innovative solutions.

Conclusion

Chen-Yi Liu's contributions to HDMI technology exemplify the impact of innovative thinking in the field of electronics. His work not only enhances the performance of HDMI systems but also sets a foundation for future advancements in digital communication.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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