Hsinchu Hsien, Taiwan

Chen Hsi Chieh


Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 16(Granted Patents)


Company Filing History:


Years Active: 2002

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1 patent (USPTO):Explore Patents

Title: The Innovative Contributions of Chen Hsi Chieh

Introduction

Chen Hsi Chieh is a notable inventor based in Hsinchu Hsien, Taiwan. He has made significant contributions to the field of semiconductor manufacturing, particularly through his innovative patent. His work has had a profound impact on the efficiency and effectiveness of interconnections in electronic devices.

Latest Patents

Chen Hsi Chieh holds a patent for a self-aligned dual damascene method. This method is designed for fabricating an interconnection between a conductive line and a via plug on an insulating layer. The process involves several steps, including forming a conductive line pattern, etching the insulating layer, and producing a via pattern. The method enhances alignment and coverage effects, which are crucial for the performance of semiconductor devices.

Career Highlights

Chen is currently employed at TSMC-Acer Semiconductor Manufacturing Corporation, where he applies his expertise in semiconductor technology. His role at the company allows him to contribute to cutting-edge advancements in the industry. His innovative approach has positioned him as a valuable asset in the field of semiconductor manufacturing.

Collaborations

Chen has collaborated with notable coworkers, including Wu Kuo Chien and Chen Han Ping. These collaborations have fostered a creative environment that encourages innovation and the development of new technologies.

Conclusion

Chen Hsi Chieh's contributions to semiconductor manufacturing through his innovative patent demonstrate his expertise and commitment to advancing technology. His work continues to influence the industry and pave the way for future innovations.

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