Che-Wei Jiang

Title: Innovations by Che-Wei Jiang in Integrated Circuit Design

Introduction

Che-Wei Jiang is a notable inventor based in Tainan, Taiwan. He has made significant contributions to the field of integrated circuit design, particularly through his innovative patent that enhances the efficiency of circuit placement.

Latest Patents

Che-Wei Jiang holds a patent for a "Hierarchy-based analytical placement method for an integrated circuit." This invention involves a placer that produces a global placement plan specifying positions of cell instances to be interconnected by nets within an integrated circuit (IC). The method begins by clusterizing cell instances to form a pyramidal hierarchy of blocks. An initial global placement plan is generated, specifying the position of each block at the highest level of the hierarchy. The placer then declusterizes this plan by replacing the highest level blocks with their component blocks. It improves the routability of the global placement plan by iteratively moving specified block positions based on a dynamically analyzed objective function. This function includes a total wirelength term and a bin density term that reflects the density of blocks in specified areas of the IC. The process is repeated until all blocks are positioned at the lowest level of the hierarchy, ensuring sufficient white space in each bin.

Career Highlights

Che-Wei Jiang is currently employed at Springsoft USA, Inc., where he continues to develop innovative solutions in integrated circuit design. His work has been instrumental in advancing the methodologies used in the industry.

Collaborations

One of his notable collaborators is Tung-Chieh Chen, with whom he has worked on various projects related to integrated circuit design.

Conclusion

Che-Wei Jiang's contributions to integrated circuit design through his innovative patent demonstrate his expertise and commitment to advancing technology in this field. His work continues to influence the efficiency of circuit placement methodologies.