Chao-Hsiang Wang

Title: Innovations of Chao-Hsiang Wang

Introduction

Chao-Hsiang Wang is a notable inventor based in Taipei, Taiwan. He has made significant contributions to the field of semiconductor technology, particularly in the development of memory devices. His innovative work has led to the creation of a unique patent that enhances the performance and efficiency of NOR-type ROMs.

Latest Patents

Chao-Hsiang Wang holds a patent for a "NOR-type ROM with hierarchical-BL structure, dynamic segmentation shielding, and source programming." This invention includes a plurality of bitcells forming multiple cell arrays, local bit lines (LBLs) connected to the drains of the bitcells, and odd/even selection circuits that correspond to the bitcells in the cell array. The design also features global bit lines (GBLs) connected to the selection circuits and odd-even precharge circuits linked with the GBLs. The source of each bitcell can be selectively grounded or floating based on the code-pattern, which enhances the overall functionality of the memory device.

Career Highlights

Chao-Hsiang Wang is affiliated with National Chung Cheng University, where he contributes to research and development in semiconductor technologies. His academic background and research initiatives have positioned him as a key figure in the field.

Collaborations

Chao-Hsiang Wang collaborates with Jinn-Shyan Wang, who is also involved in similar research areas. Their partnership has fostered advancements in memory technology and has led to innovative solutions in the industry.

Conclusion

Chao-Hsiang Wang's contributions to the field of semiconductor technology, particularly through his patent on NOR-type ROMs, highlight his role as an influential inventor. His work continues to impact the development of efficient memory devices, showcasing the importance of innovation in technology.