Morgan Hill, CA, United States of America

Carl James Taylor

This inventor holds 2 USPTO granted patents and 1 published patent application. Top assignee: National Semiconductor Corporation. Active years: 1997.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Carl James Taylor. Retrieved from https://idiyas.com/inventor/carl-james-taylor

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 2 

% Patents Active = 100.0

Average Co-Inventor Count = 2.4

ph-index = 2

Forward Citations = 77(Granted Patents)


Company Filing History:


Years Active: 1997

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2 patents (USPTO):Explore Patents

Title: Carl James Taylor and His Patent Contributions.

Introduction

Carl James Taylor is an inventor associated with Morgan Hill, California, and National Semiconductor Corporation. His work includes inventions for portable peripheral cards that address electrostatic discharge, electromagnetic interference, and physical protection of circuit boards and components. Taylor is credited with 2 patents.

Latest Patents

Taylor’s listed patent, “Overmolded PC Board with ESD Protection and EMI Suppression,” describes a portable peripheral card with protection against electrostatic discharge (ESD) and electromagnetic interference (EMI). The design uses a solid overmolded housing to protect the printed circuit board and its integrated circuits, while also making the components more difficult to access.

Career Highlights

Taylor’s patent work reflects an emphasis on combining electrical protection with durable physical construction. The overmolded design aims to shield sensitive electronics while providing a strong housing for a portable card.

Collaborations

Taylor’s listed coworkers include Michael W. Patterson and Gordon Force. His work is associated with National Semiconductor Corporation.

Conclusion

Carl James Taylor’s patent contributions focus on protecting portable electronic hardware through integrated ESD and EMI safeguards and a robust overmolded structure.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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