Princeton, NJ, United States of America

Brian L Mark

This inventor holds 3 USPTO granted patents. Top assignee: Nec USA, Inc.. Active years: 2001-2002.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Brian L Mark. Retrieved from https://idiyas.com/inventor/brian-l-mark-8q50zja8

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.3

ph-index = 3

Forward Citations = 287(Granted Patents)


Company Filing History:


Years Active: 2001-2002

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3 patents (USPTO):Explore Patents

Title: Innovations by Brian L Mark

Introduction

Brian L Mark is a notable inventor based in Princeton, NJ (US). He has made significant contributions to the field of telecommunications, particularly in the area of Asynchronous Transfer Mode (ATM) networks. With a total of 3 patents to his name, Mark's work has had a substantial impact on network efficiency and quality of service.

Latest Patents

One of Mark's latest patents is titled "Dynamic rate control scheduler for ATM networks." This invention introduces a Dynamic Rate Control (DRC) scheduler that effectively manages the scheduling of cells for service in a generic ATM switch. The DRC ensures that each traffic stream associated with an internal switch queue is rate-shaped according to a minimum guaranteed rate, along with a dynamic component based on congestion information within the switch. This innovative approach not only achieves high utilization but also guarantees a minimum throughput for each stream while fairly distributing unused bandwidth. The DRC's flexibility allows for the distribution of unused bandwidth to be assigned in a manner that does not necessarily adhere to minimum throughput guarantees, unlike traditional weighted fair share schedulers. Additionally, the DRC can control internal congestion at bottleneck points within a multistage switch and can be extended beyond the local switch in a hop-by-hop manner.

Another significant patent by Mark is the "Time-based scheduler architecture and method for ATM networks." This invention presents a flexible and scalable architecture that implements dynamic rate control scheduling in an ATM switch. The scheduler shapes numerous streams according to rate values that are computed dynamically based on switch congestion information. To accommodate a wide range of bit rates, multiple timewheels with varying time granularities are employed. The streams are dynamically assigned to these timewheels based on computed rate values, and the architecture supports priority levels for arbitrating among streams that are simultaneously eligible to transmit.

Career Highlights

Brian L Mark is currently employed at NEC USA, Inc., where he continues to innovate and contribute to advancements in telecommunications technology. His work has been instrumental in enhancing the performance and reliability of ATM networks.

Collaborations

Mark has collaborated with several talented individuals in his field, including Ruixue Fan and Gopalakrishnan Ramamurthy. These collaborations have further enriched his research and development efforts.

Conclusion

Brian L Mark's contributions to the field of telecommunications through his innovative patents have significantly advanced the

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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