Essex Junction, VT, United States of America

Brian L Kinsman

This inventor holds 1 USPTO granted patent. Top assignee: Globalfoundries Inc.. Active years: 2016.


Average Co-Inventor Count = 6.0

ph-index = 1


Company Filing History:


Years Active: 2016

Loading Chart...
1 patent (USPTO):Explore Patents

Title: Innovations of Brian L Kinsman in Integrated Circuit Design

Introduction

Brian L Kinsman is a notable inventor based in Essex Junction, Vermont, recognized for his contributions to integrated circuit technology. With a focus on reducing stress in integrated circuits, Kinsman has made significant strides in the field of semiconductor design.

Latest Patents

Kinsman holds a patent for an integrated circuit and design structure that features reduced through silicon via-induced stress. This invention provides a method for designing integrated circuits that minimizes substrate stress by strategically placing through silicon via (TSV) placeholder cells in an IC design file. The innovative approach involves interspersing TSV cells with different orientations to effectively reduce TSV-induced stress in the IC substrate.

Career Highlights

Kinsman is currently employed at GlobalFoundries Inc., a leading semiconductor manufacturer. His work at the company has allowed him to apply his expertise in integrated circuit design and contribute to advancements in the industry.

Collaborations

Throughout his career, Kinsman has collaborated with esteemed colleagues such as Jeffrey P Bonn and Brent A Goplen. These partnerships have fostered a collaborative environment that encourages innovation and the sharing of ideas.

Conclusion

Brian L Kinsman's work in integrated circuit design exemplifies the importance of innovation in technology. His patent for reducing TSV-induced stress showcases his commitment to advancing semiconductor technology and improving the performance of integrated circuits.

Profile summary based on public USPTO records.
Please report any incorrect information to [email protected]
Loading…