This inventor holds 1 USPTO granted patent. Top assignee: Avant! Corporation. Active years: 1999.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 1999
Title: Brian Allan Zimmerman: Innovator in Integrated Circuit Technology
Introduction
Brian Allan Zimmerman is a notable inventor based in Durham, NC (US). He has made significant contributions to the field of integrated circuit technology, particularly in the area of post-layout verification operations. His innovative approach has led to the development of methods and apparatus that enhance the efficiency of circuit design.
Latest Patents
Zimmerman holds a patent for "Methods, apparatus and computer program products for performing a bounded parasitic extraction." This invention focuses on a method that performs a bounded parasitic extraction of all nets in an integrated circuit. The process involves initial resistance-only and capacitance-only extractions using computationally inexpensive electrical models. By combining these extractions with models of active devices, realistic delay models can be generated for each extracted net. This allows users to control the extraction process based on their specified timing error tolerance, ensuring efficiency and accuracy in circuit design.
Career Highlights
Brian Allan Zimmerman is currently employed at Avant! Corporation, where he continues to work on innovative solutions in integrated circuit technology. His expertise and dedication to advancing the field have made him a valuable asset to his team and the industry.
Collaborations
Zimmerman collaborates with Vivek Raghavan, a fellow innovator at Avant! Corporation. Together, they contribute to the development of cutting-edge technologies that push the boundaries of integrated circuit design.
Conclusion
Brian Allan Zimmerman is a distinguished inventor whose work in integrated circuit technology has made a significant impact. His patented methods for parasitic extraction demonstrate his commitment to innovation and efficiency in circuit design.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile