Santa Clara, CA, United States of America

Brad Davis

This inventor holds 1 USPTO granted patent. Top assignees: Advanced Micro Devices Corporation, Spansion LLC.. Active years: 2008.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Brad Davis. Retrieved from https://idiyas.com/inventor/brad-davis-tn4iku46

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 4.0

ph-index = 1


Company Filing History:


Years Active: 2008

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1 patent (USPTO):Explore Patents

Title: Brad Davis - Innovator in Interconnect Technology

Introduction

Brad Davis is a notable inventor based in Santa Clara, California. He has made significant contributions to the field of semiconductor technology, particularly in methods that enhance the performance of interconnect metal layers.

Latest Patents

Brad Davis holds a patent titled "Method for decreasing sheet resistivity variations of an interconnect metal layer." This innovative method involves forming trenches in a dielectric layer situated over a wafer. A metal layer is then formed over the dielectric layer and in the trenches, resulting in a dome-shaped profile. This design leads to reduced thickness variation of interconnect lines across the wafer after a planarizing process, ultimately improving sheet resistivity uniformity.

Career Highlights

Throughout his career, Brad has worked with prominent companies in the semiconductor industry, including Spansion LLC and Advanced Micro Devices Corporation. His expertise in interconnect technology has positioned him as a valuable asset in these organizations.

Collaborations

Brad has collaborated with talented professionals such as Kashmir S. Sahota and Krishnashree Achuthan, contributing to advancements in semiconductor technology.

Conclusion

Brad Davis is a distinguished inventor whose work in interconnect technology has made a lasting impact on the semiconductor industry. His innovative methods continue to influence the development of more efficient electronic devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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