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For the Inventor, By the Inventor

San Jose, CA, United States of America

Billie Jean Rivera

USPTO Granted Patents = 5

Average Co-Inventor Count = 3.1

ph-index = 3

Forward Citations = 13(Granted Patents)


Company Filing History:

goldMedal4 out of 10 
 
Virtual Silicon Technology, Inc.
 patents
where one patent can have more than one assignee

Years Active: 2004-2009

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5 patents (USPTO):
1. RE40855 - Integrated circuit having a reduced spacing between a bus and adjacent circuitry (2009-07-13),
2. 7051308 - Method and apparatus for integrated circuit design with library cells (2006-05-23),
3. 6839882 - Method and apparatus for design of integrated circuits (2005-01-04),
4. 6766496 - Method and apparatus for integrated circuit design with a software tool (2004-07-20),
5. 6687880 - Integrated circuit having a reduced spacing between a bus and adjacent circuitry (2004-02-03),

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