Newtown, CT, United States of America

Azeez Jennudin Bhavnagarwala

This inventor holds 33 USPTO granted patents and 3 published patent applications, primarily in Non-Volatile Memory. Top assignees: Arm Limited, International Business Machines Corporation. Active years: 2004-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Azeez Jennudin Bhavnagarwala. Retrieved from https://idiyas.com/inventor/azeez-jennudin-bhavnagarwala

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 33 

% Patents Active = 81.8

Average Co-Inventor Count = 3.0

ph-index = 13

Forward Citations = 398(Granted Patents)


Location History:

  • Danbury, CT (US) (2004 - 2013)
  • Newton, CT (US) (2005 - 2017)
  • Newtown, CT (US) (2004 - 2019)

Company Filing History:


Years Active: 2004-2019

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Areas of Expertise:
Non-Volatile Memory
SRAM Stability
Configurable Impedance
Selective Writes
High Dielectric Materials
Leakage Suppression
Digital Logic
Integrated Circuits
Bootstrapped Storage
Dynamic Dual Vt SRAM
Low Voltage Register Files
Process Variations
33 patents (USPTO):Explore Patents

Title: Azeez Jennudin Bhavnagarwala: Innovator in Non-Volatile Memory Technology

Introduction

Azeez Jennudin Bhavnagarwala is a distinguished inventor based in Newtown, CT, USA. With an impressive portfolio of 33 patents, Bhavnagarwala has made significant contributions to the field of non-volatile memory devices. His innovative methodologies have advanced the way these devices operate, showcasing his expertise and creative thinking in technology.

Latest Patents

Among his most recent patents, Azeez has developed two notable innovations:

1. **Method, System and Device for Non-Volatile Memory Device Operation** - This patent discloses methods, systems, and devices aimed at enhancing the operation of non-volatile memory devices. It introduces the correlated electron switch (CES) device, which can be placed in multiple memory states during write operations. Additionally, the design limits current between terminals during read operations, allowing for higher voltages and thus increased gain. The use of bipolar write operations significantly improves the write window and durability of the CES device.

2. **Method, System and Device for Complementary Non-Volatile Memory Device Operation** - In this patent, Bhavnagarwala details methods and devices for operating dual non-volatile memory devices. This innovation allows two non-volatile memory devices, coupled in series, to be placed in complementary memory states. By carefully controlling the current and voltage applied to these terminals, his methodology enhances memory device operations.

Career Highlights

Azeez Jennudin Bhavnagarwala has held significant roles at prominent technology companies, including Arm Limited and International Business Machines Corporation (IBM). His work at these renowned organizations has allowed him to further refine his skills and develop groundbreaking technologies in the field of memory devices.

Collaborations

Throughout his career, Azeez has worked alongside notable professionals, including Stephen Victor Kosonocky and Lucian Shifren. These collaborations not only emphasize his teamwork abilities but also showcase the collective effort towards innovation in technological advancements.

Conclusion

In conclusion, Azeez Jennudin Bhavnagarwala stands out as an influential inventor in the domain of non-volatile memory device technology. His significant patent contributions demonstrate his commitment to advancing the field and highlight his capability to innovate within the tech industry. As technology continues to evolve, Azeez’s work will undoubtedly play a crucial role in shaping the future of memory devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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