Arunava Dutta

Title: Arunava Dutta: Innovator in Error Correction Technologies

Introduction

Arunava Dutta is a notable inventor based in Calcutta, India. He has made significant contributions to the field of error correction technologies, particularly in the context of Generic Framing Procedure (GFP) superblocks. His innovative approach has led to the development of methods that enhance data integrity in communication systems.

Latest Patents

Arunava Dutta holds a patent for "Methods and apparatus for error correction of transparent GFP (Generic Framing Procedure) superblocks." This patent outlines methods for correcting errors in a GFP-T superblock, which includes buffering the 64 bytes of data in an 8×8 byte buffer, buffering the flag byte in a separate buffer, calculating the CRC remainder, and performing single and double bit error correction in three stages. The first stage involves comparing the CRC remainder to a single bit error syndrome table to correct any identified errors. The second stage compares the CRC remainder to a double bit error syndrome table for further error correction. The third stage addresses any second errors of a double bit error. The flag byte is processed first, followed by the data bytes, eight bytes at a time.

Career Highlights

Arunava Dutta is currently associated with Transwitch Corporation, where he applies his expertise in error correction technologies. His work has been instrumental in advancing the reliability of data transmission systems.

Collaborations

Arunava has collaborated with notable colleagues such as Santanu Bhattacharya and Neeraj Gupta, contributing to various projects that enhance communication technologies.

Conclusion

Arunava Dutta's innovative work in error correction technologies has made a significant impact in the field of data communication. His patent and contributions reflect his commitment to improving data integrity and reliability in modern communication systems.