Bucheon, South Korea

Armand Vincent Jereza

This inventor holds 2 USPTO granted patents. Top assignee: Fairchild Semiconductor Corporation. Active years: 2010-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Armand Vincent Jereza. Retrieved from https://idiyas.com/inventor/armand-vincent-jereza

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 3.4

ph-index = 1

Forward Citations = 10(Granted Patents)


Location History:

  • Cebu, PH (2010)
  • Bucheon-si, KR (2017)

Company Filing History:


Years Active: 2010-2017

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2 patents (USPTO):Explore Patents

Title: Armand Vincent Jereza: Innovator in Semiconductor Technology

Introduction

Armand Vincent Jereza is a notable inventor based in Bucheon-si, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 2 patents. His work focuses on developing advanced semiconductor device packages that enhance performance and efficiency.

Latest Patents

Jereza's latest patents include innovations in thin semiconductor device packages. In a general aspect, a packaged semiconductor device can include a semiconductor die having at least a first terminal on a first side of the semiconductor die and a second terminal on a second side of the semiconductor die. The device can include a leadframe portion electrically coupled to the first terminal of the semiconductor die and a clip portion electrically coupled to the second terminal of the semiconductor die. Additionally, the device can include a molding compound. A surface of the leadframe portion and a first surface of the molding compound can define at least a portion of a first surface of the device. A surface of the clip portion and a second surface of the molding compound can define at least a portion of a second surface of the device that is parallel to the first surface of the device.

Another significant patent involves power quad flat no-lead semiconductor die packages with isolated heat sinks for high-voltage, high-power applications. This patent discloses PQFN semiconductor die packages for high-voltage, high-power applications, systems using the packages, and methods of making the packages. An exemplary package comprises a leadframe, a semiconductor die disposed on the leadframe, and a heat sink member disposed on the semiconductor die and the leadframe, integrated into the molding material of the package. The heat sink member has an electrically insulating substrate with a high breakdown voltage, and one or more conductive layers disposed on a first surface of the substrate that electrically interconnect the semiconductor to one or more leads of the leadframe.

Career Highlights

Armand Jereza is currently employed at Fairchild Semiconductor Corporation, where he continues to innovate in the semiconductor industry. His work has been instrumental in advancing the technology used in high-performance electronic devices.

Collaborations

Throughout his career, Jereza has collaborated with talented individuals such as Joon-seo Son and Romel Nogas Manatad. These collaborations have contributed to the successful development of his patented technologies.

Conclusion

Armand Vincent J

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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