This inventor holds 2 USPTO granted patents. Top assignee: Xilinx, Inc.. Active years: 2007-2012.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Location History:
- Los Gatos, CA (US) (2007)
- Campbell, CA (US) (2012)
Company Filing History:
Years Active: 2007-2012
Title: The Innovations of Andrew M. Taylor
Introduction
Andrew M. Taylor is a notable inventor based in Campbell, California. He has made significant contributions to the field of programmable integrated circuits, holding 2 patents that showcase his expertise and innovative spirit. His work has had a profound impact on the technology industry, particularly in the realm of manufacturing tests and fault diagnosis for programmable devices.
Latest Patents
One of Andrew's latest patents is focused on a manufacturing test for a programmable integrated circuit implementing a specific user design. This invention involves methods and systems that generate a manufacturing test of a programmable integrated circuit and optionally test the circuit with the manufacturing test. A netlist is generated that represents a specific user design implemented in programmable resources of the integrated circuit. The netlist includes user registers that are implemented in a portion of the logic registers of the programmable logic resources. Additionally, a virtual scan chain is added to the netlist, and scan-test vectors are generated using automatic test pattern generation (ATPG). These vectors are designed to serially scan the logic registers via the virtual scan chain and are converted into access-test vectors that access the registers through a configuration port of the programmable integrated circuit. This invention allows for optional testing of the integrated circuit for manufacturing defects using the access-test vectors.
Another significant patent by Andrew is related to automated fault diagnosis in a programmable device. This method and apparatus simplify and reduce the time required for detecting faults in a programmable logic device (PLD). By utilizing fault coverage information corresponding to multiple test patterns for the PLD, the set of potential faults is reduced. In one embodiment, each test pattern is designated as either passing or failing, allowing for the elimination of faults detectable by at least two failing test patterns and those not detectable by any passing test patterns. This innovative approach streamlines the fault diagnosis process, making it more efficient.
Career Highlights
Andrew M. Taylor is currently employed at Xilinx, Inc., a leading company in the field of programmable logic devices. His work at Xilinx has allowed him to further develop his skills and contribute to groundbreaking technologies in the industry.
Collaborations
Throughout his career, Andrew has collaborated with talented individuals such as Shahin Toutounchi and Ismed D. Hartanto. These collaborations have fostered an environment of innovation and creativity, leading to advancements in programmable technology.
Conclusion
Andrew
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile