This inventor holds 1 USPTO granted patent. Top assignee: Advanced Micro Devices Corporation. Active years: 2001.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
Company Filing History:
Years Active: 2001
Title: André Stolmeijer and Trench Isolation for Field-Effect Transistors
Introduction
André Stolmeijer is an inventor associated with Santa Clara, California, and Advanced Micro Devices Corporation. His patent work addresses integrated-circuit fabrication, particularly the isolation of field-effect transistors (FETs).
Latest Patents
Stolmeijer is credited with 1 patent: “Trench Isolation of Field Effect Transistors.” The patent describes a method for isolating FETs with trenches while preventing parasitic edge transistors and avoiding problems such as junction leakage, breakdown, or shorting when metal silicide is used in source and drain regions.
In the described process, gate-electrode material is formed over a gate-insulating layer before trenches are etched into the gate material, insulating layer, and silicon wafer. The trenches are then filled with insulating material to separate active regions. After the gate-electrode material is etched to define the gates, their tops are essentially level with the trench tops. The process preferably forms sidewalls along the trench walls and gate electrodes. This elevated trench structure is intended to suppress parasitic edge transistors and reduce the risk of leakage or shorting.
Career Highlights
Stolmeijer’s listed patent reflects work on semiconductor-device fabrication and transistor isolation. The supplied information associates him with Advanced Micro Devices Corporation.
Collaborations
The listed coworkers are Yowjuang William Liu and Craig S. Sander. Their names are associated with Stolmeijer’s professional context in the information provided.
Conclusion
André Stolmeijer’s patent describes a trench-isolation approach designed to protect FET operating characteristics and improve reliability in integrated-circuit fabrication.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile
