Bengaluru, India

Ananth Somayaji

This inventor holds 2 USPTO granted patents. Top assignee: Texas Instruments Corporation. Active years: 2006-2017.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ananth Somayaji. Retrieved from https://idiyas.com/inventor/ananth-somayaji

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 2.7

ph-index = 2

Forward Citations = 75(Granted Patents)


Company Filing History:


Years Active: 2006-2017

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2 patents (USPTO):Explore Patents

Title: Ananth Somayaji: Semiconductor Design and Patent Contributions.

Introduction

Ananth Somayaji is an inventor based in Bengaluru, India, whose patent work addresses circuit layout and integrated-circuit design. He is associated with Texas Instruments Corporation and holds 2 patents.

Latest Patents

“Filler insertion in circuit layout” describes a method for placing filler cells in gaps between standard cells. It classifies filler cells into groups according to design requirements, then selects an insertion pattern to meet a specified ratio of horizontal and vertical density while ensuring that each group is represented in the cell row.

“Estimating current density parameters on signal leads of an integrated circuit” presents a computer-aided design approach for estimating current density on signal leads. The method models signal leads as an impedance network and driver cells as triangular current signals, using driver characterization data to determine signal parameters. Measurements of signals transferred through the network are then used to estimate current-density parameters.

Career Highlights

Somayaji’s listed inventions focus on practical challenges in semiconductor design: arranging filler cells in circuit layouts and estimating current density on integrated-circuit signal leads. His work is associated with Texas Instruments Corporation.

Collaborations

His listed coworkers include Saravanan Ambikapathy and Sani Dewal.

Conclusion

Ananth Somayaji’s two patents reflect contributions to circuit-layout methods and computer-aided analysis of integrated-circuit signal leads.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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