Austin, TX, United States of America

Ana Lucia Rescala Loper

This inventor holds 1 USPTO granted patent. Top assignee: Apple Inc.. Active years: 2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ana Lucia Rescala Loper. Retrieved from https://idiyas.com/inventor/ana-lucia-rescala-loper

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 1.0


Company Filing History:


Years Active: 2026

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1 patent (USPTO):Explore Patents

Title: Ana Lucia Rescala Loper: Patent Inventor in Austin

Introduction

Ana Lucia Rescala Loper is an inventor based in Austin, Texas, and is associated with Apple Inc. Her patent work concerns processor architecture and the scheduling of source-data access in single-instruction multiple-thread (SIMT) pipelines.

Latest Patents

Her listed patent, “Granular Source Read Scheduling for Instruction Execution,” describes techniques for accessing source data in SIMT pipelines. The disclosed system uses arbitration circuitry to manage access to operand resources for different SIMT execution slots. It can begin capturing an operand after a group wins arbitration for one resource, before that group has won arbitration for all its operands. Once the group wins arbitration for all required operands, instruction control circuitry can release the instruction into the processor pipeline. Rescala Loper is listed as an inventor on 1 patent.

Career Highlights

Rescala Loper’s listed invention addresses coordination between operand access and instruction execution. By allowing source capture to begin as individual resource arbitration decisions are made, the approach describes a more granular scheduling process within a processor pipeline. Her listed company affiliation is Apple Inc.

Collaborations

David K. Li and Arun Bansal are identified as coworkers. The available information does not specify their roles in the patent or whether they collaborated with Rescala Loper on this invention.

Conclusion

Ana Lucia Rescala Loper’s listed patent reflects work on SIMT processor pipelines, focusing on how operand resources are accessed and instructions are scheduled for execution.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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