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Cupertino, CA, United States of America

Amir Yashfe

This inventor holds 4 USPTO granted patents. Top assignee: National Semiconductor Corporation. Active years: 2007-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Amir Yashfe. Retrieved from https://idiyas.com/inventor/amir-yashfe

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4

% Patents Active = 100.0

Average Co-Inventor Count = 3.0

ph-index = 1

Forward Citations = 4(Granted Patents)

Location History:

Tel-Mond, IL (2008)
Tel-Mord, IL (2009)
Cupertino, CA (US) (2007 - 2010)

Company Filing History:

National Semiconductor Corporation

Years Active: 2007-2010

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4 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 7647571 - Method of identifying state nodes at the transistor level in a sequential digital circuit (2010-01-12),

2. 7581199 - Use of state nodes for efficient simulation of large digital circuits at the transistor level (2009-08-25),

3. 7412695 - Transient state nodes and a method for their identification (2008-08-12),

4. 7216307 - Method of identifying state nodes at the transistor level in a sequential digital circuit using minimum combinatorial feedback loop (2007-05-08),

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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