This inventor holds 1 USPTO granted patent. Top assignee: University of California. Active years: 2006.
Company Filing History:
Years Active: 2006
Title: The Innovations of Alexander Z Zelikovsky
Introduction
Alexander Z Zelikovsky is a notable inventor based in Roswell, GA (US). He has made significant contributions to the field of integrated circuits, particularly in the area of floorplan evaluation and routing. His innovative approach has led to the development of a unique method that enhances the efficiency of integrated circuit design.
Latest Patents
Zelikovsky holds a patent for a method and system titled "Floorplan evaluation, global routing, and buffer insertion for integrated circuits." This patent describes a comprehensive approach to evaluating a floorplan and defining a global buffered routing for integrated circuits. The process involves constructing a graphical representation of the integrated circuit floorplan, which includes wire capacity and buffer capacity. Additionally, it formulates an integer linear program from the graphical representation and finds a solution to this program. He has 1 patent to his name.
Career Highlights
Zelikovsky is affiliated with the University of California, where he continues to advance research in integrated circuit design. His work has been instrumental in improving the methodologies used in the industry, making him a respected figure among his peers.
Collaborations
Throughout his career, Zelikovsky has collaborated with esteemed colleagues such as Andrew B Kahng and Ion Mandoiu. These partnerships have fostered innovation and have contributed to the advancement of technology in their field.
Conclusion
Alexander Z Zelikovsky's contributions to integrated circuit design through his innovative patent and collaborations highlight his importance in the field. His work continues to influence the development of efficient methodologies in technology.