Newport, RI, United States of America

Alan J Deerfield

This inventor holds 3 USPTO granted patents. Top assignee: Raytheon Company. Active years: 1976-1990.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Alan J Deerfield. Retrieved from https://idiyas.com/inventor/alan-j-deerfield

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 100.0

Average Co-Inventor Count = 2.0

ph-index = 3

Forward Citations = 108(Granted Patents)


Location History:

  • Newtonville, MA (US) (1976)
  • Newport, RI (US) (1989 - 1990)

Company Filing History:


Years Active: 1976-1990

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3 patents (USPTO):Explore Patents

Title: Alan J Deerfield: Innovator in Memory Addressing Technologies

Introduction

Alan J Deerfield is a notable inventor based in Newport, RI (US). He has made significant contributions to the field of memory addressing technologies, holding a total of 3 patents. His work has been instrumental in advancing the efficiency and capabilities of memory systems.

Latest Patents

Deerfield's latest patents include a groundbreaking method and apparatus for addressing memory by array transformations. This innovation features a memory with an address generator located in an intelligent port. The address generator produces address sequences specified by an array transformation operator in a programmable processor. This allows a controlling processor to prepare the next instruction in parallel with the memory execution of the current instruction. The intelligent port creates complex data structures from input data arrays stored in memory and directs the transformation of these data structures into output data streams. The memory system comprises multiple read-write memory banks and a bank of read-only memory, interconnected through intelligent ports and buses to other processor units. An arbitration and switching network is employed to assign memory banks to the intelligent ports.

Another patent by Deerfield also focuses on addressing memory by array transformations. This invention features an address generator that generates nested address sequences specified by an array transformation operator. This operator allows the controlling processor to prepare the next instruction while executing a complex present instruction. The address generator produces row and column indices based on parameters expressed relative to an initial reference point, enabling efficient data representation for vectors, matrices, or blocks.

Career Highlights

Alan J Deerfield is currently employed at Raytheon Company, where he continues to innovate in the field of memory technologies. His work has garnered attention for its potential to enhance processing speeds and data handling capabilities in various applications.

Collaborations

Throughout his career, Deerfield has collaborated with esteemed colleagues, including Sun-Chi Siu and Stanley M Nissen. These partnerships have contributed to the development of advanced technologies in memory addressing.

Conclusion

Alan J Deerfield's contributions to memory addressing technologies have significantly impacted the field. His innovative patents and collaborations reflect his dedication to advancing technology and improving processing efficiency.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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