Company Filing History:
Years Active: 2004
Title: Agustinus Sutandi: Innovator in Power-On Reset Circuits and OTP Bit Cells
Introduction
Agustinus Sutandi is a notable inventor based in Murphy, TX, specializing in innovative electronic circuits. He holds 2 patents that contribute significantly to the field of electronics, particularly in power management and memory technology.
Latest Patents
One of his latest patents is a low standby current power-on reset circuit. This invention describes a configuration where a first NMOS transistor's drain is coupled to a first PMOS transistor's drain, with its source connected to the ground line. The gate of the first NMOS transistor is coupled to a first capacitor, which is also connected to the ground line. The first PMOS transistor's source is linked to the power line, while its gate is coupled to a second capacitor that is grounded. The drain of this PMOS transistor provides a power-on reset indication. Additionally, a second PMOS transistor's source is connected to the power line, and its drain is coupled to the drain of a second NMOS transistor, along with the gates of the first PMOS, second PMOS, and second NMOS transistors, as well as the second capacitor. The second NMOS transistor's source connects to the gate of the first NMOS transistor and the first capacitor. A discharge circuit is also included, which is connected to the power line, ground line, and both capacitors to discharge them when the voltage on the power line drops below a certain threshold determined by the second PMOS transistor's threshold voltage.
Another significant patent by Sutandi is a one-time-programmable (OTP) bit cell with a latch circuit that features selectively programmable floating gate transistors. This OTP bit cell includes a latch circuit made of cross-coupled inverters, with a floating gate PMOS transistor inserted in each inverter. One of the floating gate PMOS transistors can be programmed through an included programming circuit, ensuring that the differential output of the latch circuit provides a consistent logic state upon reading. To program a selected floating gate PMOS transistor, appropriate write inputs are applied to the programming circuit while a high reference voltage to the OTP bit cell is raised to a level that allows programming of the selected floating gate PMOS transistor.
Career Highlights
Agustinus Sutandi is currently employed at HPL Technologies, Inc., where he continues to innovate and develop cutting-edge